Buenas tardes tengo un problema al momento de simular cualquier programa ya que se salta una instrucción siempre, es decir, si pongo:
MOVWF CNL
MOVF CCPR1H,W
MOVWF CNH
el programa ejecuta la línea 1 y 3 pero la segunda no me la muestra, aunque el PCL sigue contando las 3 instrucciones, pero el registro no se ve modificado, además note que si añadía una instrucción NOP de la forma:
MOVWF CNL
NOP
MOVF CCPR1H,W
NOP
MOVWF CNH
Iba a funcionar, en primera instancia si lo hizo con 3 o 4 registros, pero después dejaba de modificarlos, mi programa es:
PROCESSOR 18F46K80
#include <xc.inc>
; PIC18F46K80 Configuration Bit Settings
; Assembly source line config statements
; CONFIG1L
CONFIG RETEN = OFF ; VREG Sleep Enable bit (Ultra low-power regulator is Disabled (Controlled by REGSLP bit))
CONFIG INTOSCSEL = LOW ; LF-INTOSC Low-power Enable bit (LF-INTOSC in Low-power mode during Sleep)
CONFIG SOSCSEL = DIG ; SOSC Power Selection and mode Configuration bits (Digital (SCLKI) mode)
CONFIG XINST = OFF ; Extended Instruction Set (Enabled)
; CONFIG1H
CONFIG FOSC = XT ; Oscillator (XT oscillator)
CONFIG PLLCFG = OFF ; PLL x4 Enable bit (Disabled)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor (Disabled)
CONFIG IESO = OFF ; Internal External Oscillator Switch Over Mode (Disabled)
; CONFIG2L
CONFIG PWRTEN = OFF ; Power Up Timer (Disabled)
CONFIG BOREN = OFF ; Brown Out Detect (Disabled in hardware, SBOREN disabled)
CONFIG BORV = 0 ; Brown-out Reset Voltage bits (3.0V)
CONFIG BORPWR = ZPBORMV ; BORMV Power level (ZPBORMV instead of BORMV is selected)
; CONFIG2H
CONFIG WDTEN = OFF ; Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
CONFIG WDTPS = 1 ; Watchdog Postscaler (1:1)
; CONFIG3H
CONFIG CANMX = PORTB ; ECAN Mux bit (ECAN TX and RX pins are located on RB2 and RB3, respectively)
; CONFIG MSSPMSK = MSK5 ; MSSP address masking (7 Bit address masking mode)
CONFIG MCLRE = ON ; Master Clear Enable (MCLR Enabled, RE3 Disabled)
; CONFIG4L
CONFIG STVREN = OFF ; Stack Overflow Reset (Disabled)
CONFIG BBSIZ = BB1K ; Boot Block Size (2K word Boot Block size)
; CONFIG5L
CONFIG CP0 = OFF ; Code Protect 00800-03FFF (Disabled)
CONFIG CP1 = OFF ; Code Protect 04000-07FFF (Disabled)
CONFIG CP2 = OFF ; Code Protect 08000-0BFFF (Disabled)
CONFIG CP3 = OFF ; Code Protect 0C000-0FFFF (Disabled)
; CONFIG5H
CONFIG CPB = OFF ; Code Protect Boot (Disabled)
CONFIG CPD = OFF ; Data EE Read Protect (Disabled)
; CONFIG6L
CONFIG WRT0 = OFF ; Table Write Protect 00800-03FFF (Disabled)
CONFIG WRT1 = OFF ; Table Write Protect 04000-07FFF (Disabled)
CONFIG WRT2 = OFF ; Table Write Protect 08000-0BFFF (Disabled)
CONFIG WRT3 = OFF ; Table Write Protect 0C000-0FFFF (Disabled)
; CONFIG6H
CONFIG WRTC = OFF ; Config. Write Protect (Disabled)
CONFIG WRTB = OFF ; Table Write Protect Boot (Disabled)
CONFIG WRTD = OFF ; Data EE Write Protect (Disabled)
; CONFIG7L
CONFIG EBTR0 = OFF ; Table Read Protect 00800-03FFF (Disabled)
CONFIG EBTR1 = OFF ; Table Read Protect 04000-07FFF (Disabled)
CONFIG EBTR2 = OFF ; Table Read Protect 08000-0BFFF (Disabled)
CONFIG EBTR3 = OFF ; Table Read Protect 0C000-0FFFF (Disabled)
; CONFIG7H
CONFIG EBTRB = OFF ; Table Read Protect Boot (Disabled)
// config statements should precede project file includes.
PSECT variables
AC1H:
DS 1
AC2H:
DS 1
AC3H:
DS 1
AC4H:
DS 1
AC1L:
DS 1
AC2L:
DS 1
AC3L:
DS 1
AC4L:
DS 1
PR1H:
DS 1
PR2H:
DS 1
PR3H:
DS 1
PR1L:
DS 1
PR2L:
DS 1
PR3L:
DS 1
PSECT CODE, delta=2, abs
ORG 0xD004;
resetVector:
GOTO conf
PSECT programacion, delta=2, abs
ORG 0x0000;
conf:
BANKSEL TRISA
NOP
CLRF TRISA
NOP
BSF TRISA,2
NOP
BANKSEL ADCON1
NOP
MOVLW 00110000B
NOP
MOVWF ADCON1
NOP
BANKSEL ADCON2
NOP
MOVLW 10110001B
NOP
MOVWF ADCON2
NOP
BANKSEL ANCON0
NOP
MOVLW 00001111B
NOP
MOVWF ANCON0
NOP
BANKSEL ANCON1
NOP
MOVLW 00000111B
NOP
MOVWF ANCON1
NOP
BANKSEL SSPSTAT
NOP
MOVLW 00000000B
NOP
MOVWF SSPSTAT
NOP
BANKSEL TRISC
NOP
MOVLW 00010000B
NOP
MOVWF TRISC
NOP
BANKSEL SSPCON1
NOP
MOVLW 00100000B
NOP
MOVWF SSPCON1
NOP
GOTO start
start:
MOVLW 00000010B
MOVWF ADCON0
GOTO conv1
conv1:
BTFSC ADCON0,1
GOTO conv1
MOVF ADRESH,W
MOVWF AC1H
MOVF ADRESL,W
MOVWF AC1L
MOVLW 00000110B
MOVWF ADCON0
GOTO conv2
conv2:
BTFSC ADCON0,1
GOTO conv2
MOVF ADRESH,W
MOVWF AC2H
MOVF ADRESL,W
MOVWF AC2L
MOVLW 00001010B
MOVWF ADCON0
GOTO conv3
conv3:
BTFSC ADCON0,1
GOTO conv3
MOVF ADRESH,W
MOVWF AC3H
MOVF ADRESL,W
MOVWF AC3L
MOVLW 00001110B
MOVWF ADCON0
GOTO conv4
conv4:
BTFSC ADCON0,1
GOTO conv4
MOVF ADRESH,W
MOVWF AC4H
MOVF ADRESL,W
MOVWF AC4L
MOVLW 00100010B
MOVWF ADCON0
GOTO conv5
conv5:
BTFSC ADCON0,1
GOTO conv5
MOVF ADRESH,W
MOVWF PR1H
MOVF ADRESL,W
MOVWF PR1L
MOVLW 00100110B
MOVWF ADCON0
GOTO conv6
conv6:
BTFSC ADCON0,1
GOTO conv6
MOVF ADRESH,W
MOVWF PR2H
MOVF ADRESL,W
MOVWF PR2L
MOVLW 00101010B
MOVWF ADCON0
GOTO conv6
conv7:
BTFSC ADCON0,1
GOTO conv7
MOVF ADRESH,W
MOVWF PR3H
MOVF ADRESL,W
MOVWF PR3L
GOTO SPIST
SPIST:
GOTO start
