Problemas con el I2S en AT91SAM7 y un DAC

[Darukur]

Alguien tiene alguna experiencia en el protocolo I2S?
Hace 1 semana que me tiene desvelado el tema, no logro que el microcontrolador envie la secuencia de datos de manera correcta.

Subo info mientras para compartir acerca del protocolo I2S y el codec que uso (el clon chino y en el que se basa):

Protocolo I2S
Codec HT82V731
Codec TDA1311

Este protocolo usa 3 lineas:

• Clock
• Data
• WS (word select)

Con Word select se elije el canal (left o right), clock y data realizan lo que se acostumbra, los datos se toman por el receptor en el flanco de subida.

En mi caso el microcontrolador maneja clock continuo, y la data se termina cortando, lo que hace que tenga rebotes (onda cuadrada) en la salida.
He probado con una tabla onda senoidal y termina mandando dos senoidales desfasadas en amplitud, conectadas por una cuadrada (no se si se entendio )

[Darukur]

Aca posteo el codigo del driver de I2S que hice:

i2s.c

Código: C

1. /*I2S routines*/
2.  
3. /*Usart header file*/
4. #include "i2s.h"
5.  
6. /*Global Variable definition*/
7. tI2sData xI2sData;
8.  
9. /*Constant definition*/
10.  
11. eI2sInitError eI2sInit( pI2sInitData data )
12. {
13.     AT91PS_SSC pSSC = AT91C_BASE_SSC;
14.    
15.     AT91F_SSC_CfgPMC();
16.  
17.     AT91F_SSC_CfgPIO();
18.  
19.     AT91F_SSC_Configure(pSSC, configCPU_CLOCK_HZ, data->config.samplingFreq, data->config.slotByFrame *data->config.bitsBySLot * data->config.samplingFreq,     // SSC_CMR
20.         0,                                                                       // SSC_RCMR
21.         0,                                                                       // SSC_RFMR
22.         AT91C_I2S_ASY_MASTER_TX_SETTING(data->config.bitsBySLot, data->config.slotByFrame)  , // SSC_TCMR
23.         AT91C_I2S_ASY_TX_FRAME_SETTING( data->config.bitsBySLot, data->config.slotByFrame));  // SSC_TFMR
24.  
25.    
26.    
27.    
28.    
29.    
30.     /*If enabled, configure the Transmit Frame Mode Register*/
31.         if (data->config.txEnable)
32.     {
33.         /*Create and initialize TX semaphores*/
34.         if (!xI2sData.config.txEnabled)
35.         {
36.             vSemaphoreCreateBinary(xI2sData.send.mutex.xSemaphore);
37.             vSemaphoreCreateBinary(xI2sData.send.event.xSemaphore);
38.             xI2sData.send.mutex.xBlockTime = INITIAL_OS_BLOCK_TIME_MAX;
39.         }
40.  
41.         xI2sData.config.txEnabled = 1;
42.     }
43.    
44.    
45.  
46.     /*Configure and enable interrupts*/
47.     AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_SSC, AT91C_AIC_PRIOR_LOWEST + 2, AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, ( void (*)(void) ) vI2sISREntry);
48.     AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_SSC);
49.          
50.     return i2sInitSuccess;
51. }
52.  
53. void vI2sClose(void) //TODOÑ el close cerrando lo q abri
54. {
55. AT91PS_SSC pSSC = AT91C_BASE_SSC;
56.  
57.     /*Disable I2S PIO (SI, SO, SCK)*/
58.     AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, (unsigned portLONG) AT91C_PA15_TF | (unsigned portLONG) AT91C_PA16_TK | (unsigned portLONG) AT91C_PA17_TD);
59.  
60.     /*Disable PDC for I2S*/
61.     AT91F_PDC_DisableRx(AT91C_BASE_PDC_SSC);
62.     AT91F_PDC_DisableTx(AT91C_BASE_PDC_SSC);
63.  
64.     /*Disable I2S Clocks*/
65.     AT91F_PMC_DisablePeriphClock(AT91C_BASE_PMC, 1 << AT91C_ID_SSC);
66.  
67.     /*Disable TX and RX*/
68.     pSSC->SSC_CR = AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
69.     AT91F_SSC_DisableTx(pSSC);
70.     AT91F_SSC_DisableRx(pSSC);
71.  
72.     /*Disable interrupts*/
73.     AT91F_SSC_DisableIt(AT91C_BASE_SSC, AT91C_SSC_ENDTX | AT91C_SSC_ENDRX);
74.     AT91F_AIC_DisableIt(AT91C_BASE_AIC, AT91C_ID_SSC);
75.  
76.     /*Release Semaphores*/
77.     vQueueDelete(xI2sData.send.mutex.xSemaphore);
78.     vQueueDelete(xI2sData.send.event.xSemaphore);
79.     vQueueDelete(xI2sData.receive.mutex.xSemaphore);
80.     vQueueDelete(xI2sData.receive.event.xSemaphore);
81.  
82.     /*Set Module as uninit*/
83.     xI2sData.config.txEnabled = 0;
84.     xI2sData.config.rxEnabled = 0;
85. }
86.  
87. unsigned portCHAR cSendFrame(pI2sSendData pData)
88. {
89. unsigned portCHAR errCode;  
90.  
91.     if (!xI2sData.config.txEnabled) {return ERR_DEV_UNINIT;}
92.  
93.     if (xSemaphoreTake(xI2sData.send.mutex.xSemaphore, (portTickType) xI2sData.send.mutex.xBlockTime ) != pdTRUE)
94.     {
95.         return ERR_SEM_TIMEOUT;
96.     }
97.  
98.     /*Disable PDC while configuring or on the fly*/
99.     #if I2S_SENDRCV_DIS_W_SETTING == 1
100.     AT91F_PDC_DisableTx(AT91C_BASE_PDC_SSC);
101.     #endif
102.  
103.     /*Take blocking semaphore*/
104.     xSemaphoreTake(xI2sData.send.event.xSemaphore, 0);
105.  
106.     /*Load wait block time*/
107.     xI2sData.send.event.xBlockTime = pData->xBlockTime;
108.  
109.     /*Send the current and the next frame*/
110.     if ((AT91C_BASE_SSC->SSC_TNCR == 0) && (AT91C_BASE_SSC->SSC_TCR == 0))
111.     {
112.         AT91F_PDC_SetTx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size/2);
113.         AT91F_PDC_SetNextTx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size/2);
114.     }
115.     else if (AT91C_BASE_SSC->SSC_TNCR == 0)
116.     {
117.         AT91F_PDC_SetNextTx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size);
118.     }
119.        
120.     /*Enable Transmission*/
121.     #if I2S_SENDRCV_DIS_W_SETTING == 1
122.     AT91F_PDC_EnableTx(AT91C_BASE_PDC_SSC);
123.     #endif
124.  
125.     /*Enable Interrupt Mask*/
126.     AT91F_SSC_EnableIt(AT91C_BASE_SSC, AT91C_SSC_ENDTX);
127.  
128.     /*Block to wait results*/
129.     if (xSemaphoreTake(xI2sData.send.event.xSemaphore, (portTickType) xI2sData.send.event.xBlockTime ) == pdTRUE)
130.     {
131.         errCode = SUCCESS;
132.     }
133.     else { errCode = ERR_TASK_TIMEOUT; }
134.  
135.     /*Release mutex*/
136.     xSemaphoreGive(xI2sData.send.mutex.xSemaphore);
137.    
138.     return errCode;
139. }
140.  
141. unsigned portCHAR cReceiveFrame(pI2sReceiveData pData)
142. {
143. unsigned portCHAR errCode;
144.  
145.     if (!xI2sData.config.rxEnabled) {return ERR_DEV_UNINIT;}
146.  
147.     if (xSemaphoreTake(xI2sData.receive.mutex.xSemaphore, (portTickType) xI2sData.receive.mutex.xBlockTime ) != pdTRUE)
148.     {
149.         return ERR_SEM_TIMEOUT;
150.     }
151.  
152.     /*Disable PDC while configuring or on the fly*/
153.     #if I2S_SENDRCV_DIS_W_SETTING == 1
154.     AT91F_PDC_DisableRx(AT91C_BASE_PDC_I2S);
155.     #endif
156.  
157.     /*Take blocking semaphore*/
158.     xSemaphoreTake(xI2sData.receive.event.xSemaphore, 0);
159.  
160.     /*Load wait block time*/
161.     xI2sData.send.event.xBlockTime = pData->xBlockTime;
162.    
163.     /*Receive the current and the next frame*/
164.     if (AT91C_BASE_SSC->SSC_RNCR == 0)
165.     {
166.         AT91F_PDC_SetRx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size/2);
167.         AT91F_PDC_SetNextRx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size/2);
168.     }
169.     else
170.     {
171.         AT91F_PDC_SetNextRx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size);
172.     }
173.  
174.     /*Enable Reception*/
175.     #if I2S_SENDRCV_DIS_W_SETTING == 1
176.     AT91F_PDC_EnableRx(AT91C_BASE_PDC_I2S);
177.     #endif
178.  
179.     /*Enable Interrupt Mask*/
180.     AT91F_SSC_EnableIt(AT91C_BASE_SSC, AT91C_SSC_ENDRX);
181.  
182.     /*Block to wait results*/
183.     if (xSemaphoreTake(xI2sData.receive.event.xSemaphore, (portTickType) xI2sData.receive.event.xBlockTime ) == pdTRUE)
184.     {
185.         errCode = SUCCESS;
186.     }
187.     else { errCode = ERR_TASK_TIMEOUT; }
188.  
189.     /*Release mutex*/
190.     xSemaphoreGive(xI2sData.receive.mutex.xSemaphore);
191.  
192.     return errCode;
193. }
194.  
195. void vI2sISR(void)
196. {
197.     unsigned portLONG ulStatus;
198.     portBASE_TYPE xTaskWokenByI2sSend = pdFALSE;
199.     portBASE_TYPE xTaskWokenByI2sReceive = pdFALSE;
200.     AT91PS_SSC pSSC = AT91C_BASE_SSC;
201.    
202.     /* Original cause of the interruption */
203.     ulStatus = pSSC->SSC_SR &= pSSC->SSC_IMR;
204.  
205.     /*Is a Transmit interrupt*/
206.     if (ulStatus & AT91C_SSC_ENDTX)
207.     {
208.         /*Nothing more to transmit*/
209.         if (pSSC->SSC_TCR == 0) {AT91F_SSC_DisableIt(pSSC, AT91C_SSC_ENDTX);}
210.        
211.         /*Signal semaphore*/
212.         xSemaphoreGiveFromISR(xI2sData.send.event.xSemaphore, &xTaskWokenByI2sSend);
213.     }
214.  
215.     /*Is a Receive interrupt*/
216.     if (ulStatus & AT91C_SSC_ENDRX)
217.     {
218.         /*Nothing more to receive*/
219.         if (pSSC->SSC_RCR == 0) {AT91F_SSC_DisableIt(pSSC, AT91C_SSC_ENDRX);}
220.        
221.         /*Signal semaphore*/
222.         xSemaphoreGiveFromISR(xI2sData.receive.event.xSemaphore, &xTaskWokenByI2sReceive);
223.     }
224.    
225.     /* End the interrupt in the AIC. */
226.     AT91C_BASE_AIC->AIC_EOICR = 0;
227.    
228.     /* If a task was woken by either a character being received or a character
229.     being transmitted then we may need to switch to another task. */
230.     portEND_SWITCHING_ISR(xTaskWokenByI2sSend || xTaskWokenByI2sReceive);
231. }

i2s.h

Código: C

1. /*I2S routines*/
2. #ifndef I2S_H
3. #define I2S_H
4.  
5. /* Scheduler include files. */
6. #include "FreeRTOS.h"
7. #include "task.h"
8. #include "semphr.h"
9.  
10. /*Header File*/
11. #include "..\common\errcode.h"
12. #include "..\common\osdata.h"
13.  
14. /*Device specific headers*/
15. #include <AT91SAM7S64.H>
16. #include <lib_AT91SAM7S64.h>
17.  
18. /*Configurations*/
19. #define I2S_SENDRCV_DIS_W_SETTING   0 //The I2S PDC is temporarily disabled while configuring to send / receive
20.  
21. /*Definitions*/
22.  
23. #define rxEnable rxEnabled
24. #define txEnable txEnabled
25.  
26. /*IO Ports definition*/
27.  
28. /*enumerations*/
29. //Error codes for I2S initialization
30. typedef enum
31. {
32.         i2sInitSuccess = 0,
33. } eI2sInitError;
34.  
35. /*Types Definition, unions*/
36. #pragma anon_unions
37.  
38. typedef struct
39. {
40.     unsigned portLONG slotByFrame:3, bitsBySLot:6, samplingFreq:21, rxEnabled:1, txEnabled:1;
41. } tI2sConfig;
42.  
43. typedef struct
44. {
45.     tI2sConfig config;    
46.     struct {tOSData  mutex, event;} send, receive;
47. } tI2sData;
48.  
49. typedef struct
50. {
51.    tI2sConfig config;
52. } tI2sInitData, *pI2sInitData;
53.  
54. typedef struct
55. {
56.     unsigned portSHORT size, sizeInt;
57.     const unsigned portCHAR *data;
58.     portTickType xBlockTime;
59. } tI2sSendData, *pI2sSendData;
60.  
61. typedef struct
62. {
63.     unsigned portSHORT size, sizeInt;
64.     unsigned portCHAR *data;
65.     portTickType xBlockTime;
66. } tI2sReceiveData, *pI2sReceiveData;
67.  
68. /*Constants*/
69.  
70. /*Variable Definition*/
71. extern tI2sData xI2sData;
72.  
73. /*Functionality enabling*/
74.  
75. /*Public Functions and procedures Declaration*/
76. eI2sInitError eI2sInit( pI2sInitData data );
77. void vI2sClose( void );
78. unsigned portCHAR cReceiveFrame(pI2sReceiveData pData);
79. unsigned portCHAR cSendFrame(pI2sSendData pData);
80. void vI2sISR( void );
81. extern void vI2sISREntry( void ); //Interrupt entry point written in the assembler file I2sISR.s
82.  
83. /*Macro definitions*/
84. #define I2S_ASY_MASTER_TX_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
85. AT91C_SSC_CKS_DIV +\
86. AT91C_SSC_CKO_CONTINOUS +\
87. AT91C_SSC_START_FALL_RF +\
88. ((1 << 16) & AT91C_SSC_STTDLY) +\
89. ((((nb_bit_by_slot * nb_slot_by_frame) / 2) - 1) << 24))
90.    
91. #define I2S_ASY_TX_FRAME_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
92. (nb_bit_by_slot-1)  +\
93. AT91C_SSC_MSBF +\
94. (((nb_slot_by_frame - 1) << 8) & AT91C_SSC_DATNB) +\
95. (((nb_bit_by_slot - 1) << 16) & AT91C_SSC_FSLEN) +\
96. AT91C_SSC_FSOS_NEGATIVE)
97. #endif //I2S_H

Aca posteo un ejemplo simple de su uso:

Código: C

1. /* Scheduler include files. */
2. #include "FreeRTOS.h"
3. #include "task.h"
4.  
5. /* Hardware specific headers */
6. #include "board.h"
7.  
8. /*Modules Header files*/
9. #include "i2s\i2s.h"
10.  
11. /*Global const*/
12. const unsigned portCHAR psin[] =
13. {
14.     127, 127, 133, 133, 139, 139, 146, 146, 152, 152, 158, 158, 164, 164, 170, 170, 176, 176, 181, 181, 187, 187, 192, 192, 198, 198, 203, 203, 208, 208, 212, 212, 217,
15.     217, 221, 221, 225, 225, 229, 229, 233, 233, 236, 236, 239, 239, 242, 242, 244, 244, 247, 247, 249, 249, 250, 250, 252, 252, 253, 253, 253, 253, 254, 254, 254, 254,
16.     254, 254, 253, 253, 253, 253, 252, 252, 250, 250, 249, 249, 247, 247, 244, 244, 242, 242, 239, 239, 236, 236, 233, 233, 229, 229, 225, 225, 221, 221, 217, 217, 212,
17.     212, 208, 208, 203, 203, 198, 198, 192, 192, 187, 187, 181, 181, 176, 176, 170, 170, 164, 164, 158, 158, 152, 152, 146, 146, 139, 139, 133, 133, 127, 127, 121, 121,
18.     115, 115, 108, 108, 102, 102, 96, 96, 90, 90, 84, 84, 78, 78, 73, 73, 67, 67, 62, 62, 56, 56, 51, 51, 46, 46, 42, 42, 37, 37, 33, 33, 29, 29, 25, 25, 21, 21, 18, 18,
19.     15, 15, 12, 12, 10, 10, 7, 7, 5, 5, 4, 4, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 4, 4, 5, 5, 7, 7, 10, 10, 12, 12, 15, 15, 18, 18, 21, 21, 25, 25, 29,
20.     29, 33, 33, 37, 37, 42, 42, 46, 46, 51, 51, 56, 56, 62, 62, 67, 67, 73, 73, 78, 78, 84, 84, 90, 90, 96, 96, 102, 102, 108, 108, 115, 115, 121, 121
21. };
22.  
23. /*Defines*/
24.  
25. /*Global vars*/
26. //Data for the demo task
27. xTaskHandle xI2SDemoHandle;
28.  
29. //Data for I2S
30. tI2sInitData xInitData;
31. tI2sSendData xSendData;
32.  
33. /*Functions and Tasks*/
34. static void prvSetupHardware( void );
35. static void vI2SDemo( void *pvParameters );
36.  
37. /*Main Program*/
38. int main( void )
39. {
40.     /* Setup the ports */
41.     prvSetupHardware();
42.  
43.     /*Tasks Start-up*/
44.     xTaskCreate(vI2SDemo, "I2SDemo", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY + 1, &xI2SDemoHandle);
45.  
46.     /*Start the scheduler.*/
47.     vTaskStartScheduler();
48.  
49.     /* Should never get here! */
50.     return 0;
51. }
52.  
53. /*A Demo of the features in the Graphic LCD driver for FreeRTOS*/
54. static void vI2SDemo( void *pvParameters )
55. {
56.     for ( ; ; )
57.     {
58.         /*Prepare Init Data*/
59.         xInitData.config.slotByFrame = 2;
60.         xInitData.config.bitsBySLot = 8;
61.         xInitData.config.samplingFreq = 16000;
62.         xInitData.config.rxEnabled = 0;
63.         xInitData.config.txEnabled = 1;
64.  
65.         /*Init Device*/
66.         eI2sInit(&xInitData);
67.  
68.         /*Repeat sending a frame*/
69.         while (1)
70.         {
71.             /*Prepare data to send*/
72.             xSendData.size = sizeof(psin);
73.             xSendData.sizeInt = sizeof(psin);
74.             xSendData.data = (unsigned portCHAR *) psin;
75.             xSendData.xBlockTime = 25;
76.  
77.             /*Send a frame to the i2s buffer*/
78.             cSendFrame(&xSendData);
79.         }
80.         //vTaskDelete(xI2SDemoHandle);
81.     }
82. }
83.  
84.  
85. static void prvSetupHardware( void )
86. {
87.     /* When using the JTAG debugger the hardware is not always initialised to
88.     the correct default state.  This line just ensures that this does not
89.     cause all interrupts to be masked at the start. */
90.     AT91C_BASE_AIC->AIC_EOICR = 0;
91.    
92.     /* Most setup is performed by the low level init function called from the
93.     startup asm file.
94.     */
95.  
96.     /* Enable the peripheral clock to the PIO */
97.     AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, 1 << AT91C_ID_PIOA);
98. }

Si le ven algo mal porfavor avisen, saludos.

[Darukur]

Nadie probo el I2S como para darme una manita? 

Salutes

[Nocturno]

Es el riesgo que tiene ir abriendo camino 

[Darukur]

He escuchado algunas renegadas con el I2S en el AT91SAM7S...

Miren sino este post en embeddedrelated

[Darukur]

Al final me pude poner y solucione el problema que hacia q anduviera mal.
El problema (como muchos otros) era una combinacion de varios problemas que hacia que fuera imposible detectar cual era el originador...

Primer problema:
SSC Transmit Clock Mode Register (SSC_TCMR):
En este registro hay un preset que regula el retardo antes de empezar a enviar la secuencia (STDLLY) deben tener mucho cuidado con el mismo ya que sino el DAC I2S puede no estar correctamente sincronizado con el micro, tomando la data en una zona no segura o de transicion de los datos.

Segundo Problema:
Tipo de interrupcion del DMA: La misma estaba seteada en el tipo AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL haciendo que solo tome cuando la misma esta en estado alto, cuando lo que realmente necesitamos es AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE, osea por flanco.
Esto porque era importante? porque cuando al DMA le damos datos no queremos una interrupcion cuando termine todo ya que eso significaria tener una demora hasta el enganche con la siguiente parte de la onda.
Lo que se hace es entregarle una porcion de la onda en el buffer de DMA actual y otra parte en el buffer "futuro". Cuando termina de enviar la primera trama automaticamente se pasa el buffer futuro a buffer actual, dejandonos libre el buffer futuro.
Se genera una interrupcion para posibilitarnos la carga de dicho buffer y de esta manera siempre se mantiene ocupado el dma.

Tercer problema? Cambie la version del compilador... Posible? quien sabe.

A continuacion dejo el codigo en modo texto y archivo zipeado:
En esta demo se manda al DMA y por consiguiente al DAC I2S una forma de onda senoidal completamente manejado por DMA con minima atencion del software.

Codigo principal

Código: C

1. /* Scheduler include files. */
2. #include "FreeRTOS.h"
3. #include "task.h"
4.  
5. /* Hardware specific headers */
6. #include "board.h"
7.  
8. /*Modules Header files*/
9. #include "i2s\i2s.h"
10.  
11. /*Global const*/
12. #define TABLETYPE SINE16_44100
13. #include "wavetable.h"
14.  
15. /*Defines*/
16.  
17. /*Global vars*/
18. //Data for the demo task
19. xTaskHandle xI2SDemoHandle;
20.  
21. //Data for I2S
22. tI2sInitData xInitData;
23. tI2sSendData xSendData;
24.  
25. /*Functions and Tasks*/
26. static void prvSetupHardware( void );
27. static void vI2SDemo( void *pvParameters );
28.  
29. /*Main Program*/
30. int main( void )
31. {
32.     /* Setup the ports */
33.     prvSetupHardware();
34.  
35.     /*Tasks Start-up*/
36.     xTaskCreate(vI2SDemo, "I2SDemo", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY + 1, &xI2SDemoHandle);
37.  
38.     /*Start the scheduler.*/
39.     vTaskStartScheduler();
40.  
41.     /* Should never get here! */
42.     return 0;
43. }
44.  
45. /*A Demo of the I2S funtionality*/
46. static void vI2SDemo( void *pvParameters )
47. {
48.     for ( ; ; )
49.     {
50.                 //Prepare Init Data
51.         xInitData.config.slotByFrame = SLOT_BY_FRAME;
52.         xInitData.config.bitsBySLot = BITS_BY_SLOT;
53.         xInitData.config.samplingFreq = SAMPLING_RATE;
54.         xInitData.config.rxEnabled = 0;
55.         xInitData.config.txEnabled = 1;
56.  
57.         //Init Device
58.         eI2sInit(&xInitData);
59.                
60.         //Repeat sending a frame
61.         while (1)
62.         {
63.             //Prepare data to send
64.             xSendData.size = WAVE_SIZE;
65.             xSendData.data = (const unsigned portCHAR *) waveTable;
66.             xSendData.xBlockTime = 25;
67.  
68.             //Send a frame to the i2s buffer
69.             cSendFrame(&xSendData);
70.         }
71.        
72.         //vTaskDelete(xI2SDemoHandle);
73.     }
74. }
75.  
76.  
77. static void prvSetupHardware( void )
78. {
79.     /* When using the JTAG debugger the hardware is not always initialised to
80.     the correct default state.  This line just ensures that this does not
81.     cause all interrupts to be masked at the start. */
82.     AT91C_BASE_AIC->AIC_EOICR = 0;
83.    
84.     /* Most setup is performed by the low level init function called from the
85.     startup asm file.
86.     */
87.  
88.     /* Enable the peripheral clock to the PIO */
89.     AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, 1 << AT91C_ID_PIOA);
90. }

i2s.c

Código: C

1. /*I2S routines*/
2.  
3. /*Usart header file*/
4. #include "i2s.h"
5.  
6. /*Global Variable definition*/
7. tI2sData xI2sData;
8.  
9. /*Constant definition*/
10.  
11. eI2sInitError eI2sInit( pI2sInitData data )
12. {
13.     AT91PS_SSC pSSC = AT91C_BASE_SSC;
14.    
15.     /*Disable interrupts*/
16.     AT91F_SSC_DisableIt(pSSC, AT91C_SSC_ENDTX | AT91C_SSC_ENDRX);
17.    
18.     /*Enable I2S PIO (SI, SO, SCK)*/
19.     AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, (unsigned portLONG) AT91C_PA15_TF | (unsigned portLONG) AT91C_PA16_TK | (unsigned portLONG) AT91C_PA17_TD, 0);
20.  
21.     /*Enable I2S Clocks*/
22.     AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, 1 << AT91C_ID_SSC);
23.  
24.     /*Reset SSC and disable TX and RX*/
25.     pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
26.  
27.     /*Disable PDC for I2S*/
28.     AT91F_PDC_DisableRx(AT91C_BASE_PDC_SSC);
29.     AT91F_PDC_DisableTx(AT91C_BASE_PDC_SSC);
30.  
31.     /*Initialize PDC TX and RX*/
32.     AT91F_PDC_SetTx(AT91C_BASE_PDC_SSC, 0, 0);
33.     AT91F_PDC_SetNextTx(AT91C_BASE_PDC_SSC, 0, 0);
34.     AT91F_PDC_SetRx(AT91C_BASE_PDC_SSC, 0, 0);
35.         AT91F_PDC_SetNextRx(AT91C_BASE_PDC_SSC, 0, 0);
36.  
37.     /*Define the Clock Mode Register*/
38.     AT91F_SSC_SetBaudrate(pSSC, configCPU_CLOCK_HZ, (unsigned portLONG) data->config.samplingFreq * ((unsigned portLONG) data->config.bitsBySLot * (unsigned portLONG) data->config.slotByFrame));
39.  
40.     /*If enabled, configure the Transmit Frame Mode Register*/
41.         if (data->config.txEnable)
42.     {
43.         pSSC->SSC_TFMR = I2S_ASY_TX_FRAME_SETTING(data->config.bitsBySLot, data->config.slotByFrame);
44.         pSSC->SSC_TCMR = I2S_ASY_MASTER_TX_SETTING(data->config.bitsBySLot, data->config.slotByFrame);
45.  
46.         AT91F_SSC_EnableTx(pSSC);
47.         AT91F_PDC_EnableTx(AT91C_BASE_PDC_SSC);
48.  
49.         /*Create and initialize TX semaphores*/
50.         if (!xI2sData.config.txEnabled)
51.         {
52.             vSemaphoreCreateBinary(xI2sData.send.mutex.xSemaphore);
53.             vSemaphoreCreateBinary(xI2sData.send.event.xSemaphore);
54.             xI2sData.send.mutex.xBlockTime = INITIAL_OS_BLOCK_TIME_MAX;
55.         }
56.  
57.         xI2sData.config.txEnabled = 1;
58.     }
59.    
60.     /*If enabled, configure the Receive Frame Mode Register*/
61.         if (data->config.rxEnable)
62.     {
63.         pSSC->SSC_RFMR = I2S_ASY_TX_FRAME_SETTING(data->config.bitsBySLot, data->config.slotByFrame);
64.         pSSC->SSC_RCMR = I2S_ASY_MASTER_TX_SETTING(data->config.bitsBySLot, data->config.slotByFrame);
65.  
66.         AT91F_SSC_EnableRx(pSSC);
67.         AT91F_PDC_EnableRx(AT91C_BASE_PDC_SSC);
68.  
69.         /*Create and initialize RX semaphores*/
70.         if (!xI2sData.config.rxEnabled)
71.         {
72.             vSemaphoreCreateBinary(xI2sData.receive.mutex.xSemaphore);
73.             vSemaphoreCreateBinary(xI2sData.receive.event.xSemaphore);
74.             xI2sData.receive.mutex.xBlockTime = INITIAL_OS_BLOCK_TIME_MAX;
75.         }
76.  
77.         xI2sData.config.rxEnabled = 1;
78.     }
79.  
80.     /*Configure and enable interrupts*/
81.     AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_SSC, AT91C_AIC_PRIOR_LOWEST + 2, AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE, ( void (*)(void) ) vI2sISREntry);
82.     AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_SSC);
83.          
84.     return i2sInitSuccess;
85. }
86.  
87. void vI2sClose(void) //TODOÑ el close cerrando lo q abri
88. {
89. AT91PS_SSC pSSC = AT91C_BASE_SSC;
90.  
91.     /*Disable I2S PIO (SI, SO, SCK)*/
92.     AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, (unsigned portLONG) AT91C_PA15_TF | (unsigned portLONG) AT91C_PA16_TK | (unsigned portLONG) AT91C_PA17_TD);
93.  
94.     /*Disable PDC for I2S*/
95.     AT91F_PDC_DisableRx(AT91C_BASE_PDC_SSC);
96.     AT91F_PDC_DisableTx(AT91C_BASE_PDC_SSC);
97.  
98.     /*Disable I2S Clocks*/
99.     AT91F_PMC_DisablePeriphClock(AT91C_BASE_PMC, 1 << AT91C_ID_SSC);
100.  
101.     /*Disable TX and RX*/
102.     pSSC->SSC_CR = AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
103.     AT91F_SSC_DisableTx(pSSC);
104.     AT91F_SSC_DisableRx(pSSC);
105.  
106.     /*Disable interrupts*/
107.     AT91F_SSC_DisableIt(AT91C_BASE_SSC, AT91C_SSC_ENDTX | AT91C_SSC_ENDRX);
108.     AT91F_AIC_DisableIt(AT91C_BASE_AIC, AT91C_ID_SSC);
109.  
110.     /*Release Semaphores*/
111.     vQueueDelete(xI2sData.send.mutex.xSemaphore);
112.     vQueueDelete(xI2sData.send.event.xSemaphore);
113.     vQueueDelete(xI2sData.receive.mutex.xSemaphore);
114.     vQueueDelete(xI2sData.receive.event.xSemaphore);
115.  
116.     /*Set Module as uninit*/
117.     xI2sData.config.txEnabled = 0;
118.     xI2sData.config.rxEnabled = 0;
119. }
120.  
121. unsigned portCHAR cSendFrame(pI2sSendData pData)
122. {
123. unsigned portCHAR errCode;  
124.  
125.     if (!xI2sData.config.txEnabled) {return ERR_DEV_UNINIT;}
126.  
127.     if (xSemaphoreTake(xI2sData.send.mutex.xSemaphore, (portTickType) xI2sData.send.mutex.xBlockTime ) != pdTRUE)
128.     {
129.         return ERR_SEM_TIMEOUT;
130.     }
131.  
132.     /*Disable PDC while configuring or on the fly*/
133.     #if I2S_SENDRCV_DIS_W_SETTING == 1
134.     AT91F_PDC_DisableTx(AT91C_BASE_PDC_SSC);
135.     #endif
136.  
137.     /*Take blocking semaphore*/
138.     xSemaphoreTake(xI2sData.send.event.xSemaphore, 0);
139.  
140.     /*Load wait block time*/
141.     xI2sData.send.event.xBlockTime = pData->xBlockTime;
142.  
143.     /*Send the current and the next frame*/
144.     if ((AT91C_BASE_SSC->SSC_TNCR == 0) && (AT91C_BASE_SSC->SSC_TCR == 0))
145.     {
146.         AT91F_PDC_SetTx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size/2);
147.         AT91F_PDC_SetNextTx(AT91C_BASE_PDC_SSC, (char *) &(pData->data[pData->size/2]), pData->size/2);
148.     }
149.     else if (AT91C_BASE_SSC->SSC_TNCR == 0)
150.     {
151.         AT91F_PDC_SetNextTx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size);
152.     }
153.        
154.     /*Enable Transmission*/
155.     #if I2S_SENDRCV_DIS_W_SETTING == 1
156.     AT91F_PDC_EnableTx(AT91C_BASE_PDC_SSC);
157.     #endif
158.  
159.     /*Enable Interrupt Mask*/
160.     AT91F_SSC_EnableIt(AT91C_BASE_SSC, AT91C_SSC_ENDTX);
161.  
162.     /*Block to wait results*/
163.     if (xSemaphoreTake(xI2sData.send.event.xSemaphore, (portTickType) xI2sData.send.event.xBlockTime ) == pdTRUE)
164.     {
165.         errCode = SUCCESS;
166.     }
167.     else { errCode = ERR_TASK_TIMEOUT; }
168.  
169.     /*Release mutex*/
170.     xSemaphoreGive(xI2sData.send.mutex.xSemaphore);
171.    
172.     return errCode;
173. }
174.  
175. unsigned portCHAR cReceiveFrame(pI2sReceiveData pData)
176. {
177. unsigned portCHAR errCode;
178.  
179.     if (!xI2sData.config.rxEnabled) {return ERR_DEV_UNINIT;}
180.  
181.     if (xSemaphoreTake(xI2sData.receive.mutex.xSemaphore, (portTickType) xI2sData.receive.mutex.xBlockTime ) != pdTRUE)
182.     {
183.         return ERR_SEM_TIMEOUT;
184.     }
185.  
186.     /*Disable PDC while configuring or on the fly*/
187.     #if I2S_SENDRCV_DIS_W_SETTING == 1
188.     AT91F_PDC_DisableRx(AT91C_BASE_PDC_I2S);
189.     #endif
190.  
191.     /*Take blocking semaphore*/
192.     xSemaphoreTake(xI2sData.receive.event.xSemaphore, 0);
193.  
194.     /*Load wait block time*/
195.     xI2sData.send.event.xBlockTime = pData->xBlockTime;
196.    
197.     /*Receive the current and the next frame*/
198.     if (AT91C_BASE_SSC->SSC_RNCR == 0)
199.     {
200.         AT91F_PDC_SetRx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size/2);
201.         AT91F_PDC_SetNextRx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size/2);
202.     }
203.     else
204.     {
205.         AT91F_PDC_SetNextRx(AT91C_BASE_PDC_SSC, (char *) pData->data, pData->size);
206.     }
207.  
208.     /*Enable Reception*/
209.     #if I2S_SENDRCV_DIS_W_SETTING == 1
210.     AT91F_PDC_EnableRx(AT91C_BASE_PDC_I2S);
211.     #endif
212.  
213.     /*Enable Interrupt Mask*/
214.     AT91F_SSC_EnableIt(AT91C_BASE_SSC, AT91C_SSC_ENDRX);
215.  
216.     /*Block to wait results*/
217.     if (xSemaphoreTake(xI2sData.receive.event.xSemaphore, (portTickType) xI2sData.receive.event.xBlockTime ) == pdTRUE)
218.     {
219.         errCode = SUCCESS;
220.     }
221.     else { errCode = ERR_TASK_TIMEOUT; }
222.  
223.     /*Release mutex*/
224.     xSemaphoreGive(xI2sData.receive.mutex.xSemaphore);
225.  
226.     return errCode;
227. }
228.  
229. void vI2sISR(void)
230. {
231.     unsigned portLONG ulStatus;
232.     portBASE_TYPE xTaskWokenByI2sSend = pdFALSE;
233.     portBASE_TYPE xTaskWokenByI2sReceive = pdFALSE;
234.     AT91PS_SSC pSSC = AT91C_BASE_SSC;
235.    
236.     /* Original cause of the interruption */
237.     ulStatus = pSSC->SSC_SR &= pSSC->SSC_IMR;
238.  
239.     /*Is a Transmit interrupt*/
240.     if (ulStatus & AT91C_SSC_ENDTX)
241.     {
242.         /*Nothing more to transmit*/
243.         if (pSSC->SSC_TCR == 0)
244.                         {AT91F_SSC_DisableIt(pSSC, AT91C_SSC_ENDTX);}
245.        
246.         /*Signal semaphore*/
247.         xSemaphoreGiveFromISR(xI2sData.send.event.xSemaphore, &xTaskWokenByI2sSend);
248.     }
249.  
250.     /*Is a Receive interrupt*/
251.     if (ulStatus & AT91C_SSC_ENDRX)
252.     {
253.         /*Nothing more to receive*/
254.         if (pSSC->SSC_RCR == 0) {AT91F_SSC_DisableIt(pSSC, AT91C_SSC_ENDRX);}
255.        
256.         /*Signal semaphore*/
257.         xSemaphoreGiveFromISR(xI2sData.receive.event.xSemaphore, &xTaskWokenByI2sReceive);
258.     }
259.    
260.     /* End the interrupt in the AIC. */
261.     AT91C_BASE_AIC->AIC_EOICR = 0;
262.    
263.     /* If a task was woken by either a character being received or a character
264.     being transmitted then we may need to switch to another task. */
265.     portEND_SWITCHING_ISR(xTaskWokenByI2sSend || xTaskWokenByI2sReceive);
266. }

i2s.h

Código: C

1. /*I2S routines*/
2. #ifndef I2S_H
3. #define I2S_H
4.  
5. /* Scheduler include files. */
6. #include "FreeRTOS.h"
7. #include "task.h"
8. #include "semphr.h"
9.  
10. /*Header File*/
11. #include "..\common\errcode.h"
12. #include "..\common\osdata.h"
13.  
14. /*Device specific headers*/
15. #include <AT91SAM7S64.H>
16. #include <lib_AT91SAM7S64.h>
17.  
18. /*Configurations*/
19. #define I2S_SENDRCV_DIS_W_SETTING   0 //The I2S PDC is temporarily disabled while configuring to send / receive
20.  
21. /*Definitions*/
22.  
23. #define rxEnable rxEnabled
24. #define txEnable txEnabled
25.  
26. /*IO Ports definition*/
27.  
28. /*enumerations*/
29. //Error codes for I2S initialization
30. typedef enum
31. {
32.         i2sInitSuccess = 0,
33. } eI2sInitError;
34.  
35. /*Types Definition, unions*/
36. #pragma anon_unions
37.  
38. typedef struct
39. {
40.     unsigned portLONG slotByFrame:3, bitsBySLot:6, samplingFreq:21, rxEnabled:1, txEnabled:1;
41. } tI2sConfig;
42.  
43. typedef struct
44. {
45.     tI2sConfig config;    
46.     struct {tOSData  mutex, event;} send, receive;
47. } tI2sData;
48.  
49. typedef struct
50. {
51.    tI2sConfig config;
52. } tI2sInitData, *pI2sInitData;
53.  
54. typedef struct
55. {
56.     unsigned portSHORT size;
57.     const unsigned portCHAR *data;
58.     portTickType xBlockTime;
59. } tI2sSendData, *pI2sSendData;
60.  
61. typedef struct
62. {
63.     unsigned portSHORT size;
64.     unsigned portCHAR *data;
65.     portTickType xBlockTime;
66. } tI2sReceiveData, *pI2sReceiveData;
67.  
68. /*Constants*/
69.  
70. /*Variable Definition*/
71. extern tI2sData xI2sData;
72.  
73. /*Functionality enabling*/
74.  
75. /*Public Functions and procedures Declaration*/
76. eI2sInitError eI2sInit( pI2sInitData data );
77. void vI2sClose( void );
78. unsigned portCHAR cReceiveFrame(pI2sReceiveData pData);
79. unsigned portCHAR cSendFrame(pI2sSendData pData);
80. void vI2sISR( void );
81. extern void vI2sISREntry( void ); //Interrupt entry point written in the assembler file I2sISR.s
82.  
83. /*Macro definitions*/
84. #define I2S_ASY_MASTER_TX_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
85. AT91C_SSC_CKS_DIV +\
86. AT91C_SSC_CKO_CONTINOUS +\
87. AT91C_SSC_START_FALL_RF +\
88. ((0 << 16) & AT91C_SSC_STTDLY) +\
89. ((((nb_bit_by_slot * nb_slot_by_frame) / 2) - 1) << 24))
90.    
91. #define I2S_ASY_TX_FRAME_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
92. (nb_bit_by_slot-1)  +\
93. AT91C_SSC_MSBF +\
94. (((nb_slot_by_frame - 1) << 8) & AT91C_SSC_DATNB) +\
95. (((nb_bit_by_slot - 1) << 16) & AT91C_SSC_FSLEN) +\
96. AT91C_SSC_FSOS_NEGATIVE)
97. #endif //I2S_H

La tabla de onda esta en un archivo aparte para no ensuciar la demo (obvio incluido en el zip).
Saludos y espero que les guste

El codigo esta disponible aca o en google code de sistemasembebidos (solo el modulo)

[Darukur]

Le hice una pequeña mejora al driver y al demo:
Al driver cuando es la primer trama, anteriormente la mitad era para el buffer actual y la otra mitad para el futuro.
Pero si el buffer no era divisible por 2 o no tenia 2 o mas bytes generaria glitches o falla.
Ahora divide el buffer por 2, el total menos la mitad va al buffer actual y el resto (si hay) al futuro.
Si no hay para el buffer futuro no se realiza dicha tarea.

Con respecto a la demo, se envia una senoidal y luego 3 dientes de sierra.

Código: C

1. /*A Demo of the I2S funtionality*/
2. static void vI2SDemo( void *pvParameters )
3. {
4. unsigned portCHAR cnt;
5.     for ( ; ; )
6.     {
7.                 //Prepare Init Data
8.         xInitData.config.slotByFrame = SINE_16_SLOT_BY_FRAME;
9.         xInitData.config.bitsBySLot = SINE_16_BITS_BY_SLOT;
10.         xInitData.config.samplingFreq = SINE_16_SAMPLING_RATE;
11.         xInitData.config.rxEnabled = 0;
12.         xInitData.config.txEnabled = 1;
13.  
14.         //Init Device
15.         eI2sInit(&xInitData);
16.  
17.                 //Set Block time
18.                 xSendData.xBlockTime = 25;
19.                
20.         //Repeat sending a frame
21.         while (1)
22.         {
23.             //Prepare data to send sine
24.             xSendData.size = SINE_16_SIZE;
25.             xSendData.data = (const unsigned portCHAR *) sine16Table;
26.            
27.             //Send 1 sine frame to the i2s buffer
28.             cSendFrame(&xSendData);
29.  
30.                         //Prepare data to send saw
31.             xSendData.size = SAW_16_SIZE;
32.             xSendData.data = (const unsigned portCHAR *) saw16Table;
33.            
34.             //Send 3 saw frames to the i2s buffer
35.             for (cnt = 0; cnt < 3; cnt++) cSendFrame(&xSendData);
36.  
37.         }
38.        
39.         //vTaskDelete(xI2SDemoHandle);
40.     }
41. }

De regalo una fotito con la demo:


Salutes

demo i2s

[Nocturno]

¿Es muy rápido eso, Darukur?

[Darukur]

¿Es muy rápido eso, Darukur?

No entendi la pregunta, que cosa si es rapido?
Por las dudas cuento, esta configurado a 44.1 Ksps 16 bits estereo y la senoidal tiene 500 muestras (250 para cada canal) y la de diente de sierra tiene 256 muestras (128 por canal) (= se envia 3 veces).
la frec final de la senoidal seria: f = 44100 / 250 = 176 hz
la frec de la de diente de sierra: f = 44100 / 128 = 344 hz

[Nocturno]

Pues a eso me refería, a la señal que se ve en el osciloscopio. Gracias por la respuesta.