Has definido los bits de configuración? Por lo que veo si no los defines, MPLAB pone el Extended como activado!
#pragma config XINST=OFF
; Background Debugger Enable bit:
; DEBUG = ON Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug
; DEBUG = OFF Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins
;
; Extended Instruction Set Enable bit:
; XINST = OFF Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
; XINST = ON Instruction set extension and Indexed Addressing mode enabled
;
; Stack Overflow/Underflow Reset Enable bit:
; STVR = OFF Reset on stack overflow/underflow disabled
; STVR = ON Reset on stack overflow/underflow enabled
;
; Watchdog Timer Enable bit:
; WDT = OFF WDT disabled (control is placed on SWDTEN bit)
; WDT = ON WDT enabled
;
; Code Protection bit:
; CP0 = ON Program memory is code-protected
; CP0 = OFF Program memory is not code-protected
;
; Fail-Safe Clock Monitor Enable bit:
; FCMEN = OFF Fail-Safe Clock Monitor disabled
; FCMEN = ON Fail-Safe Clock Monitor enabled
;
; Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit:
; bien = OFF Two-Speed Start-up disabled
; IESO = ON Two-Speed Start-up enabled
;
; Default/Reset System Clock Select bit:
; FOSC2 = OFF INTRC enabled as system clock when OSCCON<1:0> = 00
; FOSC2 = ON Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00
;
; Oscillator Selection bits:
; FOSC = HS HS oscillator
; FOSC = HSPLL HS oscillator, PLL enabled and under software control
; FOSC = EC EC oscillator, CLKO function on OSC2
; FOSC = ECPLL EC oscillator, PLL enabled and under software control, CLKO function on OSC2
;
; Watchdog Timer Postscale Select bits:
; WDTPS = 1 1:1
; WDTPS = 2 1:2
; WDTPS = 4 1:4
; WDTPS = 8 1:8
; WDTPS = 16 1:16
; WDTPS = 32 1:32
; WDTPS = 64 1:64
; WDTPS = 128 1:128
; WDTPS = 256 1:256
; WDTPS = 512 1:512
; WDTPS = 1024 1:1024
; WDTPS = 2048 1:2048
; WDTPS = 4096 1:4096
; WDTPS = 8192 1:8192
; WDTPS = 16384 1:16384
; WDTPS = 32768 1:32768
;
; Ethernet LED Enable bit:
; ETHLED = OFF RA0/RA1 function as I/O regardless of Ethernet module status
; ETHLED = ON RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled
;
; ECCP MUX bit:
; ECCPMX = OFF ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4
; ECCPMX = ON ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3
;
; ECCP2 MUX bit:
; CCP2MX = OFF ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (80-pin and 100-pin devices) or with RB3 in Extended Microcontroller mode (100-pin devices only)
; CCP2MX = ON ECCP2/P2A is multiplexed with RC1