#if defined (ADC_V1) || defined (ADC_V2) || defined (ADC_V3) || defined (ADC_V4) ||\
defined (ADC_V5) || defined (ADC_V6) || defined (ADC_V8) || defined (ADC_V9) ||\
defined (ADC_V11) || defined (ADC_V12)
/* ***** clock source ***** */
#ifdef USE_OR_MASKS
#define ADC_FOSC_2 0b00000000 // A/D clock source Fosc/2
#define ADC_FOSC_4 0b01000000 // A/D clock source Fosc/4
#define ADC_FOSC_8 0b00010000 // A/D clock source Fosc/8
#define ADC_FOSC_16 0b01010000 // A/D clock source Fosc/16
#define ADC_FOSC_32 0b00100000 // A/D clock source Fosc/32
#define ADC_FOSC_64 0b01100000 // A/D clock source Fosc/64
#define ADC_FOSC_RC 0b01110000 // A/D clock source Internal RC OSC
#define ADC_FOSC_MASK (~ADC_FOSC_RC)
/* ***** acquisition time ***** */
#define ADC_0_TAD 0b00000000
#define ADC_2_TAD 0b00000010
#define ADC_4_TAD 0b00000100
#define ADC_6_TAD 0b00000110
#define ADC_8_TAD 0b00001000
#define ADC_12_TAD 0b00001010
#define ADC_16_TAD 0b00001100
#define ADC_20_TAD 0b00001110
#define ADC_TAD_MASK (~ADC_20_TAD)
/********interrupt enable********/
#define ADC_INT_ON 0b10000000
#define ADC_INT_OFF 0b00000000
#define ADC_INT_MASK ~ADC_INT_ON
//-------------------------------------------------
#else // USE_OR_MASKS
#define ADC_FOSC_2 0b10001111 // A/D clock source Fosc/2
#define ADC_FOSC_4 0b11001111 // A/D clock source Fosc/4
#define ADC_FOSC_8 0b10011111 // A/D clock source Fosc/8
#define ADC_FOSC_16 0b11011111 // A/D clock source Fosc/16
#define ADC_FOSC_32 0b10101111 // A/D clock source Fosc/32
#define ADC_FOSC_64 0b11101111 // A/D clock source Fosc/64
#define ADC_FOSC_RC 0b11111111 // A/D clock source Internal RC OSC
/* ***** acquisition time ***** */
#define ADC_0_TAD 0b11110001
#define ADC_2_TAD 0b11110011
#define ADC_4_TAD 0b11110101
#define ADC_6_TAD 0b11110111
#define ADC_8_TAD 0b11111001
#define ADC_12_TAD 0b11111011
#define ADC_16_TAD 0b11111101
#define ADC_20_TAD 0b11111111
/********interrupt enable********/
#define ADC_INT_ON 0b11111111
#define ADC_INT_OFF 0b01111111
#endif // USE_OR_MASKS
#endif